STRIX

Satellite True Random Information eXtractor

A portable wireless True Random Number Generator built on an Arduino MKR Vidor 4000.

Design

Entropy comes from FPGA ring oscillators whose sampled timing jitter is XOR-combined into output bits, with no pseudo-random post-processing. A SAMD21 serves the results over USB, and over HTTP on its own WiFi access point when running without a computer (stationary mode on a charger).

4 independent generators × 90 ring oscillators. Each generator XORs its rings every 120 MHz clock (spatial) and then several consecutive bits (temporal, default 5): about 24 Mbps per generator.
Separate stream per generator, plus a combined stream of all healthy generators
On-device health tests per generator: NIST SP 800-90B repetition count and adaptive proportion, plus a dead-ring monitor
Live statistics per trial: bias, z-score, random walk and lag-1 autocorrelation, with rolling and cumulative windows
Configurable random-walk / majority-vote bias amplifier on a bias path and an autocorrelation path, with sub-trial voting
Von Neumann extractor that can be toggled on the stream, statistics and amplifier paths
Raw ring captures and frequency measurement for characterization

The USB and HTTP API is documented in arduino/strix/API.md.

Layout

fpga/rtl/: Verilog sources; fpga/sim/: testbenches; fpga/src/: Quartus project
arduino/strix/: device firmware
arduino/strix_capture/: characterization tool firmware, used by tools/jitter.py
arduino/libraries/: StrixFPGA (FPGA boot, SPI access, embedded FPGA image), VidorBoot (vendored subset of Arduino's VidorPeripherals) and WiFiNINA (Arduino's library, patched to drive the WiFi module through the FPGA's pin pass-through)
tools/: FPGA image converter, jitter and statistics experiments, API check

Development (Linux)

The toolchain is managed by devbox: arduino-cli, Intel Quartus Prime Lite (Cyclone 10 LP only, through a Nix flake in nix/), Icarus Verilog, Python and Rust.

devbox run setup: install the Arduino SAMD core (libraries are vendored in arduino/libraries/)
devbox run sim: run the FPGA testbenches
devbox run fpga: build the FPGA bitstream (about 10 minutes)
devbox run image: embed the bitstream in the StrixFPGA library
devbox run build, then devbox run upload: build and flash the firmware (PORT defaults to /dev/ttyACM0)
devbox run api-check: end-to-end check of the USB API

Serial access requires membership in the dialout group. If a firmware leaves the board unable to stay on USB, enter the bootloader: hold reset while plugging in, release, then tap reset once quickly. For characterization, flash the capture tool with devbox run upload-capture and use devbox run jitter <freq|rings|sweep|output|health|stats|amp|pairs>. devbox run onod-build builds the onod3000 test suite used by jitter output and api-check.

TODO

Bluetooth LE for mobile mode (needs a newer WiFi module firmware than the installed 1.0.0)
WiFi credentials stored on the device instead of compile-time defaults
Battery pack
3D case

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