feat: add WiFi access point with HTTP API and patched WiFiNINA

README.md

@@ -5,7 +5,7 @@ A portable wireless True Random Number Generator built on an Arduino MKR Vidor 4
 
 ## Design
 
-Entropy comes from FPGA ring oscillators whose sampled timing jitter is XOR-combined into output bits, with no pseudo-random post-processing. A SAMD21 serves the results over USB (WiFi is planned).
+Entropy comes from FPGA ring oscillators whose sampled timing jitter is XOR-combined into output bits, with no pseudo-random post-processing. A SAMD21 serves the results over USB, and over HTTP on its own WiFi access point when running without a computer (stationary mode on a charger).
 
 - 4 independent generators × 90 ring oscillators. Each generator XORs its rings every 120 MHz clock (spatial) and then several consecutive bits (temporal, default 5): about 24 Mbps per generator.
 - Separate stream per generator, plus a combined stream of all healthy generators
@@ -15,33 +15,33 @@ Entropy comes from FPGA ring oscillators whose sampled timing jitter is XOR-comb
 - Von Neumann extractor that can be toggled on the stream, statistics and amplifier paths
 - Raw ring captures and frequency measurement for characterization
 
-The USB protocol is documented in [arduino/strix/API.md](arduino/strix/API.md).
+The USB and HTTP API is documented in [arduino/strix/API.md](arduino/strix/API.md).
 
 ## Layout
 
 - `fpga/rtl/`: Verilog sources; `fpga/sim/`: testbenches; `fpga/src/`: Quartus project
 - `arduino/strix/`: device firmware
 - `arduino/strix_capture/`: characterization tool firmware, used by `tools/jitter.py`
-- `arduino/libraries/`: `StrixFPGA` (FPGA boot, SPI access, embedded FPGA image) and `VidorBoot` (vendored subset of Arduino's VidorPeripherals)
+- `arduino/libraries/`: `StrixFPGA` (FPGA boot, SPI access, embedded FPGA image), `VidorBoot` (vendored subset of Arduino's VidorPeripherals) and `WiFiNINA` (Arduino's library, patched to drive the WiFi module through the FPGA's pin pass-through)
 - `tools/`: FPGA image converter, jitter and statistics experiments, API check
 
 ## Development (Linux)
 
 The toolchain is managed by [devbox](https://www.jetify.com/devbox): `arduino-cli`, Intel Quartus Prime Lite (Cyclone 10 LP only, through a Nix flake in `nix/`), Icarus Verilog, Python and Rust.
 
-1. `devbox run setup`: install the Arduino SAMD core and libraries
+1. `devbox run setup`: install the Arduino SAMD core (libraries are vendored in `arduino/libraries/`)
 2. `devbox run sim`: run the FPGA testbenches
 3. `devbox run fpga`: build the FPGA bitstream (about 10 minutes)
 4. `devbox run image`: embed the bitstream in the `StrixFPGA` library
 5. `devbox run build`, then `devbox run upload`: build and flash the firmware (`PORT` defaults to `/dev/ttyACM0`)
 6. `devbox run api-check`: end-to-end check of the USB API
 
-Serial access requires membership in the `dialout` group. For characterization, flash the capture tool with `devbox run upload-capture` and use `devbox run jitter <freq|rings|sweep|output|health|stats|amp|pairs>`. `devbox run onod-build` builds the onod3000 test suite used by `jitter output` and `api-check`.
+Serial access requires membership in the `dialout` group. If a firmware leaves the board unable to stay on USB, enter the bootloader: hold reset while plugging in, release, then tap reset once quickly. For characterization, flash the capture tool with `devbox run upload-capture` and use `devbox run jitter <freq|rings|sweep|output|health|stats|amp|pairs>`. `devbox run onod-build` builds the onod3000 test suite used by `jitter output` and `api-check`.
 
 ## TODO
 
-- Serve randomness over WiFi (NINA pass-through in the FPGA is wired, firmware not yet)
-- Make Vidor pairable via Bluetooth
+- Bluetooth LE for mobile mode (needs a newer WiFi module firmware than the installed 1.0.0)
+- WiFi credentials stored on the device instead of compile-time defaults
 - Battery pack
 - 3D case