# Quartus build artifacts and workspace state
fpga/**/db/
fpga/**/incremental_db/
fpga/**/output_files/
fpga/**/simulation/
*.qws
*.qsf.bak
*_assignment_defaults.qdf
*.qarlog
*.rpt
*.summary
*.smsg
*.done
*.jdi
*.pin
*.sld

# Devbox
.devbox/

# Python virtualenv created by devbox
.venv/

# Generated FPGA image and capture data
arduino/strix_capture/bitstream.h
arduino/strix_capture/signature.h
captures/