4 commits

Author	SHA1	Message	Date
randogoth	504b00752a	feat: add 16-ring bank, sampled XOR, pair capture and frequency counter (FPGA v2)	2026-10-25 13:03:53 +02:00
randogoth	d51a6c0ca8	feat: add capture sketch, Vidor image tool and jitter analysis script	2026-10-25 12:30:16 +02:00
randogoth	9504ab1032	send entropy in chunks, blink LED	2024-07-27 18:39:00 +03:00
randogoth	9d3d032647	Arduino init	2024-07-27 17:05:36 +03:00