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feat: add capture sketch, Vidor image tool and jitter analysis script

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randogoth 2026-10-25 12:30:12 +02:00
parent 0332d8eb33
commit d51a6c0ca8
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@ -20,3 +20,8 @@ fpga/**/simulation/
# Python virtualenv created by devbox
.venv/
# Generated FPGA image and capture data
arduino/strix_capture/bitstream.h
arduino/strix_capture/signature.h
captures/