feat: hold the WiFi module in reset until enabled by the firmware (FPGA v8)

This commit is contained in:
randogoth 2026-10-25 16:13:29 +02:00
parent eaf8cd284a
commit 853addaa22
6 changed files with 24 additions and 9 deletions

View file

@ -1,4 +1,4 @@
// STRIX FPGA register map (FPGA version 7). Mirrors the definitions in fpga/rtl/strix_core.v,
// STRIX FPGA register map (FPGA version 8). Mirrors the definitions in fpga/rtl/strix_core.v,
// which also documents the SPI protocol and snapshot layouts.
#pragma once
@ -6,7 +6,7 @@
namespace strix {
const uint8_t FPGA_VERSION = 7;
const uint8_t FPGA_VERSION = 8;
const uint8_t READ = 0x80; // command bit 7: read
enum Register : uint8_t {
@ -42,6 +42,7 @@ enum Register : uint8_t {
REG_LEVEL_LOW = 0x2B,
REG_DROP_HIGH = 0x2C,
REG_DROP_LOW = 0x2D,
REG_NINA_CTRL = 0x2E, // bit 0: WiFi module may run
REG_GEN_HEALTH = 0x30, // + 4g: flags, RCT events, APT events, dead rings
REG_STATS = 0x40,
REG_AMP = 0x42,